We have 2 positions open in our Switzerland design center Primary activities include the design of RF/IF analog blocks for broadband telecommunication ICs integrated in a BiCMOS process, from the finalization of the block specifications and the design to the schematic capture, the layout, the test and evaluation of the prototype ICs. The candidate?s profile must show a strong emphasis on analog design.
Requirements
M.S. degree or Ph.D. degree in Electrical Engineering with a minimum of 5 years experience in analog or mixed-mode IC design at the transistor level.
Hands-on experience with BiCMOS submicron processes (0.25m or below).
Familiar with the cadence design environment, including the layout tools. The candidate will be integrated to the layout/DRC/LVS effort.
Expert in analog baseband circuit design (active filters, amplifiers, biasing and reference circuits...) typically:
Transconductor amplifier circuits, linearization techniques, dynamic range optimization.
Stabilities issues in multi-stages feedback loops.
Common mode rejection techniques.
Some experience/knowledge in RF IC design is a plus.
Solid theoretical basis of transistor model for MOS as well as bipolar devices; good understanding of noise, flicker noise, offsets, mismatches and linearity issues.
Responsibilities
Responsible for the design and debug, at the transistor level, of some integrated circuit blocks / subsystems. The exact design tasks attributed to the candidate will depend on his/her profile and experience.
Performs circuit design, simulation, layout and test.
On demand, prepares short presentations of his/her work advancement for internal design reviews.
Responsible for interacting directly with other designers and the design architect to ensure the compatibility of his/her work with the overall system.
Capable of managing his/her time and effort in a small (block level) to medium size (small subsystem) project.
